On Dictionary-Based Fault Location in Digital Logic Circuits
IEEE Transactions on Computers
Universal fault simulation using fault tuples
Proceedings of the 37th Annual Design Automation Conference
Effective diagnostics through interval unloads in a BIST environment
Proceedings of the 39th annual Design Automation Conference
Making cause-effect cost effective: low-resolution fault dictionaries
Proceedings of the IEEE International Test Conference 2001
Efficient compression and application of deterministic patterns in a logic BIST architecture
Proceedings of the 40th annual Design Automation Conference
Full fault dictionary storage based on labeled tree encoding
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
Salvaging test windows in BIST diagnostics
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Techniques to Encode and Compress Fault Dictionaries
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Multiplets, Models, and the Search for Meaning: Improving Per-Test Fault Diagnosis
ITC '02 Proceedings of the 2002 IEEE International Test Conference
Fault Dictionary Size Reduction through Test Response Superposition
ICCD '02 Proceedings of the 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD'02)
Z-Sets and Z-Detections: Circuit Characteristics that Simplify Fault Diagnosis
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Compact Dictionaries for Fault Diagnosis in Scan-BIST
IEEE Transactions on Computers
On per-test fault diagnosis using the X-fault model
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
ITC '04 Proceedings of the International Test Conference on International Test Conference
Dynamic fault dictionaries and two-stage fault isolation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Creating small fault dictionaries [logic circuit fault diagnosis]
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Scan test planning for power reduction
Proceedings of the 44th annual Design Automation Conference
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We present a new technique for generating compact dictionaries for cause-effect diagnosis in scan-BIST. This approach relies on the use of three compact dictionaries and target both modeled and unmodeled faults. We present analytical results that provide useful guidelines for the design of these compact dictionaries. We also present experimental results for the larger ISCAS-89 benchmark circuits for the diagnosis of various types of unmodeled faults.