Branch-and-bound placement for building block layout
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A faster strongly polynomial minimum cost flow algorithm
Operations Research
A flat, timing-driven design system for a high-performance CMOS processor chipset
Proceedings of the conference on Design, automation and test in Europe
Timing analysis and optimization of a high-performance CMOS processor chipset
Proceedings of the conference on Design, automation and test in Europe
PROUD: A Sea-Of-Gates Placement Algorithm
IEEE Design & Test
Standard-cell-based design methodology for high-performance support chips
IBM Journal of Research and Development - Special issue: IBM S/390 G3 and G4
Can recursive bisection alone produce routable placements?
Proceedings of the 37th Annual Design Automation Conference
A flat, timing-driven design system for a high-performance CMOS processor chipset
Proceedings of the conference on Design, automation and test in Europe
Algorithms for detailed placement of standard cells
Proceedings of the conference on Design, automation and test in Europe
Timing analysis and optimization of a high-performance CMOS processor chipset
Proceedings of the conference on Design, automation and test in Europe
Analytical minimization of half-perimeter wirelength
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
An effective congestion driven placement framework
Proceedings of the 2002 international symposium on Physical design
Net criticality revisited: an effective method to improve timing in physical design
Proceedings of the 2002 international symposium on Physical design
Local search for final placement in VLSI design
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Free space management for cut-based placement
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Designing mega-ASICs in nanogate technologies
Proceedings of the 40th annual Design Automation Conference
Gravity: Fast placement for 3-D VLSI
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Boosting: Min-Cut Placement with Improved Signal Delay
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Implementation and extensibility of an analytic placer
Proceedings of the 2004 international symposium on Physical design
Proceedings of the 2004 international symposium on Physical design
Innovate or perish: FPGA physical design
Proceedings of the 2004 international symposium on Physical design
On legalization of row-based placements
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Large-scale placement by grid-warping
Proceedings of the 41st annual Design Automation Conference
Quadratic placement using an improved timing model
Proceedings of the 41st annual Design Automation Conference
The IBM ASIC/SoC methodology--A recipe for first-time success
IBM Journal of Research and Development
Large-Scale Circuit Placement: Gap and Promise
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Multi-Million Gate FPGA Physical Design Challenges
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
An Improved Multi-Level Framework for Force-Directed Placement
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Multilevel generalized force-directed method for circuit placement
Proceedings of the 2005 international symposium on Physical design
Recursive bisection placement: feng shui 5.0 implementation details
Proceedings of the 2005 international symposium on Physical design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Timing-driven placement by grid-warping
Proceedings of the 42nd annual Design Automation Conference
Faster and better global placement by a new transportation algorithm
Proceedings of the 42nd annual Design Automation Conference
Unification of partitioning, placement and floorplanning
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Engineering details of a stable force-directed placer
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
A robust detailed placement for mixed-size IC designs
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
mPL6: enhanced multilevel mixed-size placement
Proceedings of the 2006 international symposium on Physical design
Architecture and details of a high quality, large-scale analytical placer
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
A morphing approach to address placement stability
Proceedings of the 2007 international symposium on Physical design
Mixed-size placement with fixed macrocells using grid-warping
Proceedings of the 2007 international symposium on Physical design
New theoretical results on quadratic placement
Integration, the VLSI Journal
Fast and robust quadratic placement combined with an exact linear net model
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Geometric quadrisection in linear time, with application to VLSI placement
Discrete Optimization
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This is a survey on the algorithms which are part ofa program for flat placement of large-scale VLSI processorchips. The basis is a quadratic optimization approachcombined with a new quadrisection algorithm.In contrast to most previous quadratic placement methods,no min-cut objective is used at all. Based on aquadratic placement, a completely new algorithm findsa four-way partitioning meeting capacity constraintsand minimizing the total movement.