RF microelectronics
System chip test: how will it impact your design?
Proceedings of the 37th Annual Design Automation Conference
End-to-End Test Strategy for Wireless Systems
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
A Bulti-in Self-Test Strategy for Wireless Communication Systems
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
A Statistical Sampler for Increasing Analog Circuits Observability
Proceedings of the 15th symposium on Integrated circuits and systems design
A Signature Test Framework for Rapid Production Testing of RF Circuits
Proceedings of the conference on Design, automation and test in Europe
A Statistical Sampler for a New On-Line Analog Test Method
Journal of Electronic Testing: Theory and Applications
Testing RF Signal Paths Using Spectral Analysis and Subsampling
SBCCI '03 Proceedings of the 16th symposium on Integrated circuits and systems design
RF-BIST: Loopback Spectral Signature Analysis
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Improving mixed-signal SOC testing: a power-aware reuse-based approach with analog BIST
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
Low Cost On-Line Testing Strategy for RF Circuits
Journal of Electronic Testing: Theory and Applications
An improved RF loopback for test time reduction
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Reducing Test Time Using an Enhanced RF Loopback
Journal of Electronic Testing: Theory and Applications
Evaluation of analog/RF test measurements at the design stage
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A Level-Crossing Approach for the Analysis of RF Modulated Signals Using Only Digital Test Resources
Journal of Electronic Testing: Theory and Applications
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A low cost method for testing analog RF signal paths suitable for BIST implementation in a SoC environment is described. The method is based on the use of a simple and low-cost one-bit digitizer that enables the reuse of processor and memory resources available in the SoC, while incurring little analog area overhead. The proposed method also allows a constant load to be observed by the circuit, since no switches or muxes are needed for digitizing specific test points. Mathematical background and experimental results are presented in order to validate the test approach.