Design of system-on-a-chip test access architectures under place-and-route and power constraints
Proceedings of the 37th Annual Design Automation Conference
Test scheduling for core-based systems
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Introducing Core-Based System Design
IEEE Design & Test
Standard Test Interface Language (STIL): A New Language for Patterns and Waveforms
Proceedings of the IEEE International Test Conference on Test and Design Validity
Scan chain design for test time reduction in core-based ICs
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A structured test re-use methodology for core-based system chips
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Testing embedded-core based system chips
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A structured and scalable mechanism for test access to embedded reusable cores
ITC '98 Proceedings of the 1998 IEEE International Test Conference
The Role of Test Protocols in Testing Embedded-Core-Based System ICs
ETW '99 Proceedings of the 1999 IEEE European Test Workshop
Design of System-on-a-Chip Test Access Architectures using Integer Linear Programming
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
Towards a Standard for Embedded Core Test: An Example
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Addressable Test Ports An Approach to Testing Embedded Cores
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Challenges in testing core-based system ICs
IEEE Communications Magazine
The Role of Test Protocols in Automated Test Generation for Embedded-Core-Based System ICs
Journal of Electronic Testing: Theory and Applications
Proceedings of the 40th annual Design Automation Conference
Low Cost Analog Testing of RF Signal Paths
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Noise Figure Evaluation Using Low Cost BIST
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
An improved RF loopback for test time reduction
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Reducing Test Time Using an Enhanced RF Loopback
Journal of Electronic Testing: Theory and Applications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On-line error detection and fast recover techniques for dependable embedded processors
On-line error detection and fast recover techniques for dependable embedded processors
Current Techniques and Future Trends in ES's Virtualization
Software—Practice & Experience
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A major challenge in realizing core-based system chips is the adoption and design-in of adequate test and diagnosis strategies. This tutorial paper discusses the specific challenges that come with testing deeply embedded reusable cores supplied by diverse providers, who often use different hardware description levels and mixed technologies. The paper describes a general test access architecture for embedded cores, and covers the current standardization efforts in this domain. In addition, we give an overview of the emerging EDA developments in SOC test, and illustrate the current industrial practices by means of two case studies.