Introduction to algorithms
An O-tree representation of non-slicing floorplan and its applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
B*-Trees: a new representation for non-slicing floorplans
Proceedings of the 37th Annual Design Automation Conference
Block placement with symmetry constraints based on the O-tree non-slicing representation
Proceedings of the 37th Annual Design Automation Conference
FAST-SP: a fast algorithm for block placement based on sequence pair
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Analog Device-Level Layout Automation
Analog Device-Level Layout Automation
Corner block list: an effective and efficient topological representation of non-slicing floorplan
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Automation of IC layout with analog constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
VLSI module placement based on rectangle-packing by the sequence-pair
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Module packing based on the BSG-structure and IC layout applications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Multi-level placement with circuit schema based clustering in analog IC layouts
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Automatic analog IC layout generation based on a evolutionary computation approach
Proceedings of the 9th annual conference on Genetic and evolutionary computation
Analog placement based on novel symmetry-island formulation
Proceedings of the 44th annual Design Automation Conference
Analog placement based on symmetry-island formulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
LAYGEN II: automatic analog ICs layout generator based on a template approach
Proceedings of the 14th annual conference on Genetic and evolutionary computation
Routing analog ICs using a multi-objective multi-constraint evolutionary approach
Analog Integrated Circuits and Signal Processing
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The traditional way of approaching device-level placement problems for analog layout is to explore a huge search space of absolute placement representations, where cells are allowed to illegally overlap during their moves [3, 10]. This paper presents a novel exploration technique for analog placement, operating on the set of tree representations of the layout [6, 2], where the typical presence of an arbitrary number of symmetry groups of devices is directly taken into account during the search of the solution space. The efficiency of the novel approach is due to the use of red-black interval trees [4], data structures employed to support operations on dynamic sets of intervals.