Measurement and modeling of MOS transistor current mismatch in analog IC's
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Matrix computations (3rd ed.)
Analog test design with IDD measurements for the detection of parametric and catastrophic faults
Proceedings of the conference on Design, automation and test in Europe
Statistics with Mathematica with Cdrom
Statistics with Mathematica with Cdrom
Journal of Electronic Testing: Theory and Applications
Industrial Relevance of Analog IFA: A Fact or a Fiction
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Proceedings of the IEEE International Test Conference
The Economics of Guardband Placement
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
On Maximizing the Coverage of Catastrophic and Parametric Faults
ETW '99 Proceedings of the 1999 IEEE European Test Workshop
Functional and Structural Testing of Switched-Current Circuits
ETW '99 Proceedings of the 1999 IEEE European Test Workshop
Short Circuit Faults in State-of-the-Art ADCs - Are They Hard or Soft?
ATS '01 Proceedings of the 10th Asian Test Symposium
MINVDD Testing for Weak CMOS ICs
VTS '01 Proceedings of the 19th IEEE VLSI Test Symposium
Linear Model-Based Error Identification and Calibration for Data Converters
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Overcoming Test Setup Limitations by Applying Model-Based Testing to High-Precision ADCs
Journal of Electronic Testing: Theory and Applications
Test Development Through Defect and Test Escape Level Estimation for Data Converters
Journal of Electronic Testing: Theory and Applications
Test set selection for structural faults in analog IC's
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An approach to linear model-based testing for nonlinear cascaded mixed-signal systems
Proceedings of the Conference on Design, Automation and Test in Europe
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The concept of model-based test was developed in order to reduce the production test effort for data converters (Cherubal and Chatterjee (IEEE Trans Circuits Syst part I 50(3):317---327, 2003); Stenbakken and Souders (1985) Modelling and test point selection for data converter testing. In: ITC, Int Test Conf, pp 813---817; Wegener and Kennedy (IEEE Trans Circuits Syst I 51(1):213---217, 2004); Wrixon and Kennedy (IEEE Trans Instrum Meas IM-48(5):978---985, 1999)). In applying this concept, a vector of model parameters is determined for each device under test (DUT). Typically, this model parameter vector is merely used to calculate the DUT performance characteristic which is then subject to specification-oriented testing. However, each element of the model parameter vector represents an independent error source which contributes to performance degradations; thus, the model parameter vector can be viewed as a signature of the error sources. In this work, analyzing the error source signature is used to devise a model-based methodology for hard-fault detection and diagnosis. We investigate conditions under which hard-faults are detectable/diagnosable in spite of masking effects due to manufacturing process variations. In particular, we show that taking the model parameter vector as the fault signature is optimal as it minimizes the masking effects and thus maximizes detectability/diagnosibility.