BiNoC: A bidirectional NoC architecture with dynamic self-reconfigurable channel

Authors:
Ying-Cherng Lan;Shih-Hsin Lo;Yueh-Chi Lin;Yu-Hen Hu;Sao-Jie Chen
Affiliations:
Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, ROC;Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, ROC;Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, ROC;Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WI53706, USA;Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, ROC
Venue:
NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
Year:
2009

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Abstract

A Bidirectional channel Network-on-Chip (BiNoC) architecture is proposed to enhance the performance of on-chip communication. The BiNoC allows each communication channel to be dynamically self-configured to transmit flits in either direction in order to better utilize on-chip hardware resources. This added flexibility promises better bandwidth utilization, lower packet delivery latency, and higher packet consumption rate at each on-chip router. In this paper, a novel on-chip router architecture supporting the sel-fconfiguring bidirectional channel mechanism is presented. It is shown that the associated hardware overhead is negligible. Cycle-accurate simulation runs on this BiNoC network under synthetic and real-world traffic patterns demonstrate consistent and significant performance advantage over conventional mesh grid NoC architecture equipped with hard-wired unidirectional channels.