A resonant clock generator for single-phase adiabatic systems
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Salphasic Distribution of Clock Signals for Synchronous Systems
IEEE Transactions on Computers
A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference
Proceedings of the 40th annual Design Automation Conference
Design of a 10GHz clock distribution network using coupled standing-wave oscillators
Proceedings of the 40th annual Design Automation Conference
Design of Resonant Global Clock Distributions
ICCD '03 Proceedings of the 21st International Conference on Computer Design
Two-Phase Resonant Clock Distribution
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Integrated placement and skew optimization for rotary clocking
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Design methodology for global resonant H-tree clock distribution networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Modeling, optimization and control of rotary traveling-wave oscillator
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Clock distribution scheme using coplanar transmission lines
Proceedings of the conference on Design, automation and test in Europe
Custom topology rotary clock router with tree subnetworks
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Non-uniform clock mesh optimization with linear programming buffer insertion
Proceedings of the 47th Design Automation Conference
PEEC based parasitic modeling for power analysis on custom rotary rings
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Implementing multiphase resonant clocking on a finite-impulse response filter
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Distributed Resonant clOCK grid Synthesis (ROCKS)
Proceedings of the 48th Design Automation Conference
ROA-brick topology for rotary resonant clocks
ICCD '11 Proceedings of the 2011 IEEE 29th International Conference on Computer Design
A methodology for local resonant clock synthesis using LC-assisted local clock buffers
Proceedings of the International Conference on Computer-Aided Design
Synchronization scheme for brick-based rotary oscillator arrays
Proceedings of the great lakes symposium on VLSI
High-performance clock mesh optimization
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Library-aware resonant clock synthesis (LARCS)
Proceedings of the 49th Annual Design Automation Conference
CROA: Design and Analysis of the Custom Rotary Oscillatory Array
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Revisiting automated physical synthesis of high-performance clock networks
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Clock distribution networks consume a significant portion of on-chip power. Traditional buffered clock distribution power is limited by frequency, capacitance, and activity rates. Resonant clock distributions can reduce this power by "recycling" energy on-chip and reducing the overall clock power. This tutorial introduces recent techniques for distributed-LC, traveling wave, and standing wave resonant clock distributions. In particular, the tutorial discusses the recent developments and open research problems. The tutorial covers both circuits, computer-aided design algorithms and methodologies for resonant clocking.