Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
Precomputation-based sequential logic optimization for low power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
DAC '98 Proceedings of the 35th annual Design Automation Conference
Retiming-based factorization for sequential logic optimization
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Dynamic Power Management: Design Techniques and CAD Tools
Dynamic Power Management: Design Techniques and CAD Tools
High-Level Power Analysis and Optimization
High-Level Power Analysis and Optimization
Telescopic units: a new paradigm for performance optimization of VLSI designs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimizing power using transformations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
System-level power optimization: techniques and tools
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A hybrid approach for core-based system-level power modeling
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Power optimization and management in embedded systems
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Input space adaptive design: a high-level methodology for energy and performance optimization
Proceedings of the 38th annual Design Automation Conference
Automatic source code specialization for energy reduction
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
A fast on-chip profiler memory
Proceedings of the 39th annual Design Automation Conference
Logic Synthesis and Verification
PACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Low Power Synthesis Methodology with Data Format Optimization Applied on a DWT
Journal of VLSI Signal Processing Systems
Energy-aware design techniques for differential power analysis protection
Proceedings of the 40th annual Design Automation Conference
PACT HDL: a compiler targeting ASICS and FPGAS with power and performance optimizations
Power aware computing
Quality of EDA CAD Tools: Definitions, Metrics and Directions
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
A Scalable ODC-Based Algorithm for RTL Insertion of Gated Clocks
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Implementation and Evaluation of an On-Demand Parameter-Passing Strategy for Reducing Energy
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Input space adaptive design: a high-level methodology for optimizing energy and performance
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Non-intrusive dynamic application profiler for detailed loop execution characterization
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
A novel sequential circuit optimization with clock gating logic
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Non-intrusive dynamic application profiling for multitasked applications
Proceedings of the 46th Annual Design Automation Conference
Efficient hardware-based nonintrusive dynamic application profiling
ACM Transactions on Embedded Computing Systems (TECS)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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