Software controlled power management
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Common-case computation: a high-level technique for power and performance optimization
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
System-level power optimization: techniques and tools
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Efficient power co-estimation techniques for system-on-chip design
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Fast cache and bus power estimation for parameterized system-on-a-chip design
DATE '00 Proceedings of the conference on Design, automation and test in Europe
IMPACT: a high-level synthesis system for low power control-flow intensive circuits
Proceedings of the conference on Design, automation and test in Europe
System level optimization and design space exploration for low power
Proceedings of the 14th international symposium on Systems synthesis
Lower bound estimation for low power high-level synthesis
ISSS '00 Proceedings of the 13th international symposium on System synthesis
E2WFQ: an energy efficient fair scheduling policy for wireless systems
Proceedings of the 2002 international symposium on Low power electronics and design
HA2TSD: hierarchical time slack distribution for ultra-low power CMOS VLSI
Proceedings of the 2002 international symposium on Low power electronics and design
Novel modeling techniques for RTL power estimation
Proceedings of the 2002 international symposium on Low power electronics and design
Energy/power estimation of regular processor arrays
Proceedings of the 15th international symposium on System Synthesis
Transient power management through high level synthesis
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Cosimulation-based power estimation for system-on-chip design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy-efficient signal processing using FPGAs
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Low Power Synthesis Methodology with Data Format Optimization Applied on a DWT
Journal of VLSI Signal Processing Systems
Interconnect-aware high-level synthesis for low power
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Fast system-level power profiling for battery-efficient system design
Proceedings of the tenth international symposium on Hardware/software codesign
High-Level Synthesis with SIMD Units
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
A Heuristic for Clock Selection in High-Level Synthesis
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Battery-Driven System Design: A New Frontier in Low Power Design
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Efficient RTL Power Estimation for Large Designs
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Transition Activity Estimation for General Correlated Data Distributions
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Resource Allocation and Binding Approach for Low Leakage Power
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Domain-Specific Modeling for Rapid Energy Estimation of Reconfigurable Architectures
The Journal of Supercomputing
Power efficient encoding techniques for off-chip data buses
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Energy efficient wireless packet scheduling and fair queuing
ACM Transactions on Embedded Computing Systems (TECS)
A methodology for low power scheduling with resources operating at multiple voltages
Integration, the VLSI Journal
Automated energy/performance macromodeling of embedded software
Proceedings of the 41st annual Design Automation Conference
A High-level Interconnect Power Model for Design Space Exploration
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Experience with a low power wireless mobile computing platform
Proceedings of the 2004 international symposium on Low power electronics and design
An approach for reducing dynamic power consumption in synchronous sequential digital designs
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Energy Estimation for Extensible Processors
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Interconnect-based system-level energy and power prediction to guide architecture exploration
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware Accelerated Power Estimation
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Early Assessment of Leakage Power for System Level Design
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Energy-Efficient Computations on FPGAs
The Journal of Supercomputing
Genetic Approach to Minimizing Energy Consumption of VLSI Processors Using Multiple Supply Voltages
IEEE Transactions on Computers
Power emulation: a new paradigm for power estimation
Proceedings of the 42nd annual Design Automation Conference
Multiple voltage and frequency scheduling for power minimization
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable embedded systems: Synthesis, design and application
Power estimation for cycle-accurate functional descriptions of hardware
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Adaptive chip-package thermal analysis for synthesis and design
Proceedings of the conference on Design, automation and test in Europe: Proceedings
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
Guaranteeing performance yield in high-level synthesis
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Proceedings of the conference on Design, automation and test in Europe
Energy-optimizing source code transformations for operating system-driven embedded software
ACM Transactions on Embedded Computing Systems (TECS)
Energy efficient scheduling for parallel applications on mobile clusters
Cluster Computing
A simulation framework for energy efficient data grids
Proceedings of the 39th conference on Winter simulation: 40 years! The best is yet to come
Variability-driven module selection with joint design time optimization and post-silicon tuning
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Interconnect modeling for improved system-level design optimization
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Testability analysis based on the identification of testable blocks with predefined properties
Microprocessors & Microsystems
A variation aware high level synthesis framework
Proceedings of the conference on Design, automation and test in Europe
Verifying Compiler Based Refinement of BluespecTM Specifications Using the SPIN Model Checker
SPIN '08 Proceedings of the 15th international workshop on Model Checking Software
Energy-efficient encoding techniques for off-chip data buses
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Variation-aware resource sharing and binding in behavioral synthesis
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Power optimization with power islands synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Physical realization oriented area-power-delay tradeoff exploration
SOC'09 Proceedings of the 11th international conference on System-on-chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Accurate predictive interconnect modeling for system-level design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The use of genetic algorithm to reduce power consumption during test application
ICES'10 Proceedings of the 9th international conference on Evolvable systems: from biology to hardware
Energy-aware wireless systems with adaptive power-fidelity tradeoffs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An energy reduction scheduling mechanism for a high-performance soc architecture
EUC'05 Proceedings of the 2005 international conference on Embedded and Ubiquitous Computing
Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
A Heuristic for reducing dynamic power dissipation in clocked sequential designs
PATMOS'07 Proceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation
Low-power resource binding by postsilicon customization
ACM Transactions on Design Automation of Electronic Systems (TODAES)
UVM-based verification methodology for RFID-enabled smart-sensor systems
Analog Integrated Circuits and Signal Processing
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