Hardware Implementation of Montgomery's Modular Multiplication Algorithm
IEEE Transactions on Computers
Programmable active memories: reconfigurable systems come of age
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
A method for obtaining digital signatures and public-key cryptosystems
Communications of the ACM
A Systolic, Linear-Array Multiplier for a Class of Right-Shift Algorithms
IEEE Transactions on Computers
On the Performance of Signature Schemes Based on Elliptic Curves
ANTS-III Proceedings of the Third International Symposium on Algorithmic Number Theory
Simplifying Quotient Determination in High-Radix Modular Multiplication
ARITH '95 Proceedings of the 12th Symposium on Computer Arithmetic
Montgomery Modular Exponentiation on Reconfigurable Hardware
ARITH '99 Proceedings of the 14th IEEE Symposium on Computer Arithmetic
An End-to-End Systems Approach to Elliptic Curve Cryptography
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Hardware architectures for public key cryptography
Integration, the VLSI Journal
Carry-Save Montgomery Modular Exponentiation on Reconfigurable Hardware
Proceedings of the conference on Design, automation and test in Europe - Volume 3
Accelerating the secure remote password protocol using reconfigurable hardware
Proceedings of the 1st conference on Computing frontiers
Security on FPGAs: State-of-the-art implementations and attacks
ACM Transactions on Embedded Computing Systems (TECS)
FPGA-Based Implementation of a Serial RSA Processor
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A Novel Unified Architecture for Public-Key Cryptography
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
Design, Architecture and Performance Evaluation of the Wireless Transport Layer Security
The Journal of Supercomputing
Parallelized radix-4 scalable montgomery multipliers
Proceedings of the 20th annual conference on Integrated circuits and systems design
Compact modular exponentiation accelerator for modern FPGA devices
Computers and Electrical Engineering
Hardware Complexity of Modular Multiplication and Exponentiation
IEEE Transactions on Computers
FPGA design for algebraic tori-based public-key cryptography
Proceedings of the conference on Design, automation and test in Europe
A unified architecture for a public key cryptographic coprocessor
Journal of Systems Architecture: the EUROMICRO Journal
How to Maximize the Potential of FPGA Resources for Modular Exponentiation
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Ultra High Performance ECC over NIST Primes on Commercial FPGAs
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Efficient Biometric Verification in Encrypted Domain
ICB '09 Proceedings of the Third International Conference on Advances in Biometrics
ICA3PP '09 Proceedings of the 9th International Conference on Algorithms and Architectures for Parallel Processing
Blind authentication: a secure crypto-biometric verification protocol
IEEE Transactions on Information Forensics and Security
An efficient dynamic group key agreement protocol for imbalanced wireless networks
International Journal of Network Management
Parametric encryption hardware design
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
High-Speed RSA crypto-processor with radix-4 modular multiplication and chinese remainder theorem
ICISC'06 Proceedings of the 9th international conference on Information Security and Cryptology
Flexible design of a modular simultaneous exponentiation core for embedded platforms
ARC'13 Proceedings of the 9th international conference on Reconfigurable Computing: architectures, tools, and applications
| Hi-index | 14.98 |
It is widely recognized that security issues will play a crucial role in the majority of future computer and communication systems. Central tools for achieving system security are cryptographic algorithms. This contribution proposes arithmetic architectures which are optimized for modern field programmable gate arrays (FPGAs). The proposed architectures perform modular exponentiation with very long integers. This operation is at the heart of many practical public-key algorithms such as RSA and discrete logarithm schemes. We combine a high-radix Montgomery modular multiplication algorithm with a new systolic array design. The designs are flexible, allowing any choice of operand and modulus. The new architecture also allows the use of high radices. Unlike previous approaches, we systematically implement and compare several variants of our new architecture for different bit lengths. We provide absolute area and timing measures for each architecture. The results allow conclusions about the feasibility and time-space trade-offs of our architecture for implementation on commercially available FPGAs. We found that 1,024-bit RSA decryption can be done in 3.1 ms with our fastest architecture.