DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
An Experimental Chip to Evaluate Test Techniques: Experiment Results
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
On applying non-classical defect models to automated diagnosis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
The Effectiveness of IDDQ, Functional and Scan Tests: How Many Fault Coverages Do We Need?
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
On the superiority of DO-RE-ME/MPG-D over stuck-at-based defective part level prediction
ATS '00 Proceedings of the 9th Asian Test Symposium
REDO - Probabilistic Excitation and Deterministic Observation - First Commercial Experiment
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Computer-Aided Fault to Defect Mapping (CAFDM) for Defect Diagnosis
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Enhanced DO-RE-ME Based Defect Level Prediction Using Defect Site Aggregation-MPG-D
ITC '00 Proceedings of the 2000 IEEE International Test Conference
A Comparison of Bridging Fault Simulation Methods
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Balanced Excitation and Its Effect on the Fortuitous Detection of Dynamic Defects
Proceedings of the conference on Design, automation and test in Europe - Volume 2
An Experimental Study of N-Detect Scan ATPG Patterns on a Processor
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
Excitation, Observation, and ELF-MD: Optimization Criteria for High Quality Test Sets
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
IDDX-based test methods: A survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Generation of compact test sets with high defect coverage
Proceedings of the Conference on Design, Automation and Test in Europe
Using implications to choose tests through suspect fault identification
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
Journal of Electronic Testing: Theory and Applications
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A defective-part-level model combined with a method for choosing test patterns that use site observation can predict defect levels in submicron ICs more accurately than simple stuck-at fault analysis.