On approximation algorithms for microcode bit minimization
MICRO 21 Proceedings of the 21st annual workshop on Microprogramming and microarchitecture
A new simultaneous circuit partitioning and chip placement approach based on simulated annealing
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A general multi-layer area router
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Near-optimal triangulation of a point set by simulated annealing
SAC '92 Proceedings of the 1992 ACM/SIGAPP symposium on Applied computing: technological challenges of the 1990's
An appreciation of simulated annealing to maze routing
EURO-DAC '94 Proceedings of the conference on European design automation
Interactive physically-based manipulation of discrete/continuous models
SIGGRAPH '95 Proceedings of the 22nd annual conference on Computer graphics and interactive techniques
Simulated quenching: a new placement method for module generation
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Nostradamus: a floorplanner of uncertain design
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Learning evaluation functions for global optimization and Boolean satisfiability
AAAI '98/IAAI '98 Proceedings of the fifteenth national/tenth conference on Artificial intelligence/Innovative applications of artificial intelligence
ISPD '00 Proceedings of the 2000 international symposium on Physical design
VLSI floorplanning with boundary constraints based on corner block list
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
An effective congestion driven placement framework
Proceedings of the 2002 international symposium on Physical design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Local search for final placement in VLSI design
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
A Genetic Algorithm for VLSI Floorplanning
PPSN VI Proceedings of the 6th International Conference on Parallel Problem Solving from Nature
Evolutionary and adaptive synthesis methods
Formal engineering design synthesis
Fast Hierarchical Floorplanning with Congestion and Timing Control
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Learning evaluation functions to improve optimization by local search
The Journal of Machine Learning Research
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Almost optimum placement legalization by minimum cost flow and dynamic programming
Proceedings of the 2004 international symposium on Physical design
Annealing placement by thermodynamic combinatorial optimization
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An orthogonal simulated annealing algorithm for large floorplanning problems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Modern floorplanning based on fast simulated annealing
Proceedings of the 2005 international symposium on Physical design
Aladin: A Layout Synthesys Tool for Analog Integrated Circuits
Analog Integrated Circuits and Signal Processing
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
New theoretical results on quadratic placement
Integration, the VLSI Journal
FPGA placement using space-filling curves: Theory meets practice
ACM Transactions on Embedded Computing Systems (TECS)
Automatic bus planner for dense PCBs
Proceedings of the 46th Annual Design Automation Conference
Simulated annealing techniques
Algorithms and theory of computation handbook
An automated design tool for analog layouts
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A hybrid partitioning algorithm based on natural mechanisms of decision making
Scientific and Technical Information Processing
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