On path-based learning and its applications in delay test and diagnosis

  • Authors:
  • Li-C. Wang;T. M. Mak;Kwang-Ting Cheng;Magdy S. Abadir

  • Affiliations:
  • UC-Santa Barbara, CA;Intel Corporation, Santa Clara, CA;UC-Santa Barbara, CA;Motorola, Inc, Austin, TX

  • Venue:
  • Proceedings of the 41st annual Design Automation Conference
  • Year:
  • 2004

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Abstract

This paper describes the implementation of a novel path-based learning methodology that can be applied for two purposes: (1) In a pre-silicon simulation environment, path-based learning can be used to produce a fast and approximate simulator for statistical timing simulation. (2) In post-silicon phase, path-based learning can be used as a vehicle to derive critical paths based on the pass/fail behavior observed from the test chips. Our path-based learning methodology consists of four major components: a delay test pattern set, a logic simulator, a set of selected paths as the basis for learning, and a machine learner. We explain the key concepts in this methodology and present experimental results to demonstrate its feasibility and applications.