Understanding the energy efficiency of SMT and CMP with multiclustering
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
The need for a full-chip and package thermal model for thermally optimized IC designs
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
Power-performance considerations of parallel computing on chip multiprocessors
ACM Transactions on Architecture and Code Optimization (TACO)
Techniques for Multicore Thermal Management: Classification and New Exploration
Proceedings of the 33rd annual international symposium on Computer Architecture
Proceedings of the 15th international conference on Parallel architectures and compilation techniques
Synergistic temperature and energy management in GALS processor architectures
Proceedings of the 2006 international symposium on Low power electronics and design
Power efficiency for variation-tolerant multicore processors
Proceedings of the 2006 international symposium on Low power electronics and design
Mercury and freon: temperature emulation and management for server systems
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Supporting microthread scheduling and synchronisation in CMPs
International Journal of Parallel Programming
Design space exploration for multicore architectures: a power/performance/thermal view
Proceedings of the 20th annual international conference on Supercomputing
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Improving fairness, throughput and energy-efficiency on a chip multiprocessor through DVFS
ACM SIGARCH Computer Architecture News
Limiting the power consumption of main memory
Proceedings of the 34th annual international symposium on Computer architecture
Efficient power modeling and software thermal sensing for runtime temperature monitoring
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Evaluating design tradeoffs in on-chip power management for CMPs
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Resource area dilation to reduce power density in throughput servers
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Thermal-aware scheduling for future chip multiprocessors
EURASIP Journal on Embedded Systems
IEEE Transactions on Computers
Optimal Power/Performance Pipeline Depth for SMT in Scaled Technologies
IEEE Transactions on Computers
Addressing thermal nonuniformity in SMT workloads
ACM Transactions on Architecture and Code Optimization (TACO)
Software-directed combined cpu/link voltage scaling fornoc-based cmps
SIGMETRICS '08 Proceedings of the 2008 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Analysis of dynamic power management on multi-core processors
Proceedings of the 22nd annual international conference on Supercomputing
Many-core design from a thermal perspective
Proceedings of the 45th annual Design Automation Conference
Thermal monitoring mechanisms for chip multiprocessors
ACM Transactions on Architecture and Code Optimization (TACO)
Multi-optimization power management for chip multiprocessors
Proceedings of the 17th international conference on Parallel architectures and compilation techniques
Dynamic power management framework for multi-core portable embedded system
IFMT '08 Proceedings of the 1st international forum on Next-generation multicore/manycore technologies
Thermal-aware post compilation for VLIW architectures
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Performance-aware thermal management via task scheduling
ACM Transactions on Architecture and Code Optimization (TACO)
A parallel infrastructure on dynamic EPIC SMT
ICA3PP'07 Proceedings of the 7th international conference on Algorithms and architectures for parallel processing
Performance impact of resource conflicts on chip multi-processor servers
PARA'06 Proceedings of the 8th international conference on Applied parallel computing: state of the art in scientific computing
Thermal-aware compilation for system-on-chip processing architectures
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Power-efficient, reliable microprocessor architectures: modeling and design methods
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Power and thermal characterization of POWER6 system
Proceedings of the 19th international conference on Parallel architectures and compilation techniques
Proceedings of the Conference on Design, Automation and Test in Europe
Thermal-aware memory mapping in 3D designs
Proceedings of the Conference on Design, Automation and Test in Europe
Online strategies for high-performance power-aware thread execution on emerging multiprocessors
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Run-time adaptable on-chip thermal triggers
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Hotspot: acompact thermal modeling methodology for early-stage VLSI design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the international conference on Supercomputing
A QoS Guaranteed Cache Design for Environment Friendly Computing
GREENCOM '11 Proceedings of the 2011 IEEE/ACM International Conference on Green Computing and Communications
Scalable and partitionable asynchronous arbiter for micro-threaded chip multiprocessors
ARCS'06 Proceedings of the 19th international conference on Architecture of Computing Systems
TSIC: thermal scheduling simulator for chip multiprocessors
PCI'05 Proceedings of the 10th Panhellenic conference on Advances in Informatics
The design space of CMP vs. SMT for high performance embedded processor
ICESS'05 Proceedings of the Second international conference on Embedded Software and Systems
Thermal-aware real-time task scheduling for three-dimensional multicore chip
Proceedings of the 27th Annual ACM Symposium on Applied Computing
Register file management and compiler optimization on EDSMT
ISPA'07 Proceedings of the 2007 international conference on Frontiers of High Performance Computing and Networking
A Parallel infrastructure on dynamic EPIC SMT and its speculation optimization
ISPA'07 Proceedings of the 5th international conference on Parallel and Distributed Processing and Applications
Enhancing NBTI recovery in SRAM arrays through recovery boosting
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Thermal-aware memory mapping in 3D designs
ACM Transactions on Embedded Computing Systems (TECS)
The benefit of SMT in the multi-core era: flexibility towards degrees of thread-level parallelism
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
StreaMorph: a case for synthesizing energy-efficient adaptive programs using high-level abstractions
Proceedings of the Eleventh ACM International Conference on Embedded Software
Towards software performance engineering for multicore and manycore systems
ACM SIGMETRICS Performance Evaluation Review
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Simultaneous multithreading (SMT) and chip multi-processing (CMP) both allow a chip to achieve greater throughput, but their relative energy-efficiency and thermal properties are still poorly understood. This paper uses Turandot, PowerTimer, and HotSpot to explore this design space for a POWER4/POWER5-like core. For an equal-area comparison with this style of core, we find CMP to be superior in terms of performance and energy-efficiency for CPU-bound benchmarks, but SMT to be superior for memory-bound benchmarks due to a larger L2 cache. Although both exhibit similar peak operating temperatures and thermal management overheads, the mechanism by which SMT and CMP heat up are quite different. More specifically, SMT heating is primarily caused by localized heating in certain key structures, CMP heating is mainly caused by the global impact of increased energy output. Because of this difference in heat up machanism, we found that the best thermal management technique is also different for SMT and CMP. Indeed, non-DVS localized thermal-management can outperform DVS for SMT. Finally, we show that CMP and SMT will scale differently as the contribution of leakage power grows, with CMP suffering from higher leakage due to the second core's higher temperature and the exponential temperature-dependence of subthreshold leakage.