ACM Transactions on Programming Languages and Systems (TOPLAS)
A Distributed Drafting Algorithm for Load Balancing
IEEE Transactions on Software Engineering
A technique for distributed execution of design automation tools
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
MuSiC: an event-flow computer for fast simulation of digital systems
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
The STE-264 accelerated electronic CAD system
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Star's envoling design environment: a user's perspective on CAE
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Speed up techniques of logic simulation
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
ACM Computing Surveys (CSUR)
Asynchronous distributed simulation via a sequence of parallel computations
Communications of the ACM - Special issue on simulation modeling and statistical computing
Event manipulation for discrete simulations requiring large numbers of events
Communications of the ACM
HAL: A block level HArdware Logic simulator
DAC '83 Proceedings of the 20th Design Automation Conference
A design verification methodology based on concurrent simulation and clock suppression
DAC '83 Proceedings of the 20th Design Automation Conference
Ultimate: A hardware logic simulation engine
DAC '84 Proceedings of the 21st Design Automation Conference
Hardware accelerators in the design automation environment
DAC '84 Proceedings of the 21st Design Automation Conference
Vector coding techniques for high speed digital simulation
DAC '81 Proceedings of the 18th Design Automation Conference
Table lookup techniques for fast and flexible digital logic simulation
DAC '80 Proceedings of the 17th Design Automation Conference
The Yorktown Simulation Engine: Introduction
DAC '82 Proceedings of the 19th Design Automation Conference
The Yorktown Simulation Engine
DAC '82 Proceedings of the 19th Design Automation Conference
Software support for the Yorktown Simulation Engine
DAC '82 Proceedings of the 19th Design Automation Conference
DAC '82 Proceedings of the 19th Design Automation Conference
Towards VLSI complexity: The DA algorithm scaling problem: can special DA hardware help?
DAC '82 Proceedings of the 19th Design Automation Conference
Performance analysis and design of a logic simulation machine
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
SSIM: a software levelized compiled-code simulator
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Massively parallel switch-level simulation: a feasibility study
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Logic simulation on massively parallel architectures
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Efficient circuit partitioning algorithms for parallel logic simulation
Proceedings of the 1989 ACM/IEEE conference on Supercomputing
An evaluation of the Chandy-Misra-Bryant algorithm for digital logic simulation
ACM Transactions on Modeling and Computer Simulation (TOMACS) - Special issue on parallel and distributed systems performance
Parallel logic simulation of VLSI systems
ACM Computing Surveys (CSUR)
An empirical study of on-chip parallelism
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Benchmarking Parallel Processing Platforms: An Applications Perspective
IEEE Transactions on Parallel and Distributed Systems
Parallel switch-level simulation for VLSI
EURO-DAC '91 Proceedings of the conference on European design automation
Robust partitioning for hardware-accelerated functional verification
Proceedings of the 48th Design Automation Conference
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Parallel processing is being recognized as a practical way to achieve very high performance in logic simulation of large designs. This tutorial summarizes many of the basic methods employed, and estimates attainable throughput. Next, data structuring and processing factors are explored as they impact parallel simulation. Experience indicates that support processing necessary before and after simulation kernel execution can be accelerated using parallel methods. We conclude by suggesting pitfalls to avoid, and discuss future development directions for parallel logic simulation.