Robust interfaces for mixed-timing systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Scan Test Strategy for Asynchronous-Synchronous Interfaces
Journal of Electronic Testing: Theory and Applications
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Efficient performance analysis of asynchronous systems based on periodicity
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
GALS networks on chip: a new solution for asynchronous delay-insensitive links
Proceedings of the conference on Design, automation and test in Europe: Designers' forum
Asynchronous arbiter for micro-threaded chip multiprocessors
Journal of Systems Architecture: the EUROMICRO Journal
Integration, the VLSI Journal
Dynamic Voltage and Frequency Scaling Architecture for Units Integration within a GALS NoC
NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
Serialized asynchronous links for NoC
Proceedings of the conference on Design, automation and test in Europe
Relieving physical issues in new NoC-based SoCs
Proceedings of the 2nd international conference on Nano-Networks
Integration, the VLSI Journal
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
From synchronous to GALS: A new architecture for FPGAs
Microelectronics Journal
GALS Test Chip on 130nm Process
Electronic Notes in Theoretical Computer Science (ENTCS)
Analysis and optimization of pausible clocking based GALS design
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
CSP transactors for asynchronous transaction level modeling and IP reuse
ICCSA'07 Proceedings of the 2007 international conference on Computational science and its applications - Volume Part III
High rate data synchronization in GALS socs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power reduction of asynchronous logic circuits using activity detection
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
GALDS: a complete framework for designing multiclock ASICs and socs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An Asynchronous Design for Testability and Implementation in Thin-film Transistor Technology
Journal of Electronic Testing: Theory and Applications
Scalable and partitionable asynchronous arbiter for micro-threaded chip multiprocessors
ARCS'06 Proceedings of the 19th international conference on Architecture of Computing Systems
Enhanced GALS techniques for datapath applications
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
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In a circuit environment that is becoming increasingly sensitive to dynamic power dissipation and noise, and where cycle time available for control decisions continues to decrease, locality principles are becoming paramount in controlling advancement ...