Built-in self-test support in the IBM engineering design system

Enhanced self-test techniques for VLSI systems applied to the IBM enterprise system/900 type 9121 processor

IBM Journal of Research and Development

Test methodologies and design automation for IBM ASICs

IBM Journal of Research and Development

A Test Methodology for High Performance MCMs

Journal of Electronic Testing: Theory and Applications - Special issue on multi-chip testing and design for testability

Advanced microprocessor test strategy and methodology

IBM Journal of Research and Development - Special issue: IBM S/390 G3 and G4

The Compiled Logic Simulator

IEEE Design & Test

System-on-Chip Testability Using LSSD Scan Structures

IEEE Design & Test

Single-Reference Multiple Intermediate Signature (SREMIS) Analysis for BIST

IEEE Transactions on Computers

ATPG in practical and non-traditional applications

ITC '98 Proceedings of the 1998 IEEE International Test Conference

Microprocessor test and test tool methodology for the 500 MHz IBM S/390 G5 chip

ITC '98 Proceedings of the 1998 IEEE International Test Conference

Test Structure Verification of Logical BIST: Problems and Solutions

ITC '00 Proceedings of the 2000 IEEE International Test Conference

99 % AC test coverage using only LBIST on the 1 GHz IBM S/390 zSeries 900 Microprocessor

ITC '01 Proceedings of the 2001 IEEE International Test Conference

A Building Block BIST Methodology for SOC Designs: A Case Study

ITC '01 Proceedings of the 2001 IEEE International Test Conference

OPMISR: The Foundation for Compressed ATPG Vectors

ITC '01 Proceedings of the 2001 IEEE International Test Conference

An Automatic Validation Methodology for Logic BIST in High Performance VLSI Design

ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors

Functional verification of a frequency-programmable switch chip with asynchronous clock sections

IBM Journal of Research and Development

Scan test planning for power reduction

Proceedings of the 44th annual Design Automation Conference

Blue Gene/L compute chip: control, test, and bring-up infrastructure

IBM Journal of Research and Development