Circuit reliability: from physics to architectures

Authors:
Jianxin Fang;Saket Gupta;Sanjay V. Kumar;Sravan K. Marella;Vivek Mishra;Pingqiang Zhou;Sachin S. Sapatnekar
Affiliations:
University of Minnesota, Minneapolis, MN;University of Minnesota, Minneapolis, MN;University of Minnesota, Minneapolis, MN;University of Minnesota, Minneapolis, MN;University of Minnesota, Minneapolis, MN;University of Minnesota, Minneapolis, MN;University of Minnesota, Minneapolis, MN
Venue:
Proceedings of the International Conference on Computer-Aided Design
Year:
2012

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Abstract

In the period of extreme CMOS scaling, reliability issues are becoming a critical problem. These problems include issues related to device reliability, in the form of bias temperature instability, hot carrier injection, time-dependent dielectric breakdown of gate oxides, as well as interconnect reliability concerns such as electromigration and TSV stress in 3D integrated circuits. This tutorial surveys these effects, and discusses methods for mitigating them at all levels of design.