Depth-first iterative-deepening: an optimal admissible tree search
Artificial Intelligence
Algorithms for routing and testing routability of planar VLSI layouts
STOC '85 Proceedings of the seventeenth annual ACM symposium on Theory of computing
Single-layer wire routing and compaction
Single-layer wire routing and compaction
A global router using an efficient approximate multicommodity multiterminal flow algorithm
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
An efficient timing-driven global routing algorithm
DAC '93 Proceedings of the 30th international Design Automation Conference
Filling and slotting: analysis and algorithms
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Optimal phase conflict removal for layout of dark field alternating phase shifting masks
ISPD '99 Proceedings of the 1999 international symposium on Physical design
A novel VLSI layout fabric for deep sub-micron applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Subwavelength lithography and its potential impact on design and EDA
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Approximating Fractional Multicommodity Flow Independent of the Number of Commodities
SIAM Journal on Discrete Mathematics
Yield modeling and BEOL fundamentals
Proceedings of the 2001 international workshop on System-level interconnect prediction
Provably good global buffering by multi-terminal multicommodity flow approximation
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
TEG: a new post-layout optimization method
Proceedings of the 2002 international symposium on Physical design
Closing the smoothness and uniformity gap in area fill synthesis
Proceedings of the 2002 international symposium on Physical design
Active shielding of RLC global interconnects
Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems
Provably good global buffering using an available buffer block plan
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
SURF: Rubber-Band Routing System for Multichip Modules
IEEE Design & Test
Non-tree routing for reliability and yield improvement
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A cost-driven lithographic correction methodology based on off-the-shelf sizing tools
Proceedings of the 40th annual Design Automation Conference
Faster and Simpler Algorithms for Multicommodity Flow and other Fractional Packing Problems.
FOCS '98 Proceedings of the 39th Annual Symposium on Foundations of Computer Science
New and Exact Filling Algorithms for Layout Density Control
VLSID '99 Proceedings of the 12th International Conference on VLSI Design - 'VLSI for the Information Appliance'
Floorplan Evaluation with Timing-Driven Global Wireplanning, Pin Assignment and Buffer/Wire Sizing
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Topological encoding and interchangeable pin routing
Topological encoding and interchangeable pin routing
The Y-architecture: yet another on-chip interconnect solution
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Finding obstacle-avoiding shortest paths using implicit connection graphs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Global routing by new approximation algorithms for multicommodity flow
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Provably good global buffering by generalized multiterminal multicommodity flow approximation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Cross point assignment with global rerouting for general-architecture designs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Non-tree routing [VLSI layout]
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Multilevel routing with antenna avoidance
Proceedings of the 2004 international symposium on Physical design
Manufacturing-Aware Physical Design
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
RADAR: RET-aware detailed routing using fast lithography simulations
Proceedings of the 42nd annual Design Automation Conference
Multilevel routing with jumper insertion for antenna avoidance
Integration, the VLSI Journal
Post-routing redundant via insertion and line end extension with via density consideration
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
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Design rules in advanced IC manufacturing processes are increasingly problematic for modern router architectures and algorithms. This paper first reviews types and causes of "difficult" design rules, as well as implications for current routing approaches. Next, some basic router components are assessed with respect to future viability. Last, the paper discusses prospects for future "coevolution" of design rules and detailed routing methods.