The open book: a practical perspective on OSI
The open book: a practical perspective on OSI
NIFDY: a low overhead, high throughput network interface
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
A high-speed network interface for distributed-memory systems: architecture and applications
ACM Transactions on Computer Systems (TOCS)
Computer networks (3rd ed.)
A generic architecture for on-chip packet-switched interconnections
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Addressing the system-on-a-chip interconnect woes through communication-based design
Proceedings of the 38th annual Design Automation Conference
Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
A Study on Communication Issues for Systems-on-Chip
Proceedings of the 15th symposium on Integrated circuits and systems design
Interfacing Cores with On-chip Packet-Switched Networks
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
SoCBUS: Switched Network on Chip for Hard Real Time Embedded Systems
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
Networks on Silicon: Combining Best-Effort and Guaranteed Services
Proceedings of the conference on Design, automation and test in Europe
A Network on Chip Architecture and Design Methodology
ISVLSI '02 Proceedings of the IEEE Computer Society Annual Symposium on VLSI
Guaranteeing the quality of services in networks on chip
Networks on chip
Tailoring router architectures to performance requirements in cut-through networks
Tailoring router architectures to performance requirements in cut-through networks
Understanding Video Pixel Processing Applications for Flexible Implementations
DSD '03 Proceedings of the Euromicro Symposium on Digital Systems Design
Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach
Proceedings of the conference on Design, automation and test in Europe - Volume 2
QNoC: QoS architecture and design process for network on chip
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Networks on chip
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 41st annual Design Automation Conference
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
A survey of research and practices of Network-on-chip
ACM Computing Surveys (CSUR)
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
Invited paper: Network-on-Chip design and synthesis outlook
Integration, the VLSI Journal
A methodology and a case-study for network-on-chip based MP-SoC architectures
Proceedings of the 2nd international conference on Nano-Networks
Relieving physical issues in new NoC-based SoCs
Proceedings of the 2nd international conference on Nano-Networks
Supporting vertical links for 3D networks-on-chip: toward an automated design and analysis flow
Proceedings of the 2nd international conference on Nano-Networks
Enabling dynamic and programmable QoS in SoCs
Proceedings of the Third International Workshop on Network on Chip Architectures
A saturated tree network of polling stations with flow control
Proceedings of the 23rd International Teletraffic Congress
Microprocessors & Microsystems
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In this paper we present a network interface for an on-chip network. Our network interface decouples computation from communication by offering a shared-memory abstraction, which is independent of the network implementation. We use a transaction-based protocol to achieve backward compatibility with existing bus protocols such as AXI, OCP and DTL. Our network interface has a modular architecture, which allows flexible instantiation. It provides both guaranteed and best-effort services via connections. These are configured via network interface ports using the network itself, instead of a separate control interconnect. An exampleinstance of this network interface with 4 ports has an area of 0.143mm2 in a 0.13µm technology, and runs at 500 MHz.