Feedback, correlation, and delay concerns in the power estimation of VLSI circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Extreme delay sensitivity and the worst-case switching activity in VLSI circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Power estimation in sequential circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Towards a high-level power estimation capability
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Determining accuracy bounds for simulation-based switching activity estimation
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Statistical estimation of sequential circuit activity
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Power estimation techniques for integrated circuits
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Power minimization in IC design: principles and applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A new hybrid methodology for power estimation
DAC '96 Proceedings of the 33rd annual Design Automation Conference
DAC '96 Proceedings of the 33rd annual Design Automation Conference
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Effects of correlations on accuracy of power analysis—an experimental study
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
High-level power estimation and the area complexity of Boolean functions
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Dynamic algorithm transformation (DAT) for low-power adaptive signal processing
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Power macromodeling for high level power estimation
DAC '97 Proceedings of the 34th annual Design Automation Conference
Technology-dependent transformations for low-power synthesis
DAC '97 Proceedings of the 34th annual Design Automation Conference
COSMOS: a continuous optimization approach for maximum power estimation of CMOS circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Parallel algorithms for power estimation
DAC '98 Proceedings of the 35th annual Design Automation Conference
An optimization-based error calculation for statistical power estimation of CMOS logic circuits
DAC '98 Proceedings of the 35th annual Design Automation Conference
Stream synthesis for efficient power simulation based on spectral transforms
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Energy-efficient signal processing via algorithmic noise-tolerance
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Power macro-models for DSP blocks with application to high-level synthesis
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Energy-per-cycle estimation at RTL
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
On mixture density and maximum likelihood power estimation via expectation-maximization
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Total System Energy Minimization for Wireless Image Transmission
Journal of VLSI Signal Processing Systems - Special issue on multimedia signal processing
Low-power AEC-based MIMO signal processing for gigabit ethernet 1000Base-T transceivers
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Soft digital signal processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Least-square estimation of average power in digital CMOS circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Estimation of state line statistics in sequential circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Tool for Activity Estimation in FPGAs
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Monte-Carlo Approach for Power Estimation in Sequential Circuits
EDTC '97 Proceedings of the 1997 European conference on Design and Test
EDTC '97 Proceedings of the 1997 European conference on Design and Test
A symbolic simulation approach in resolving signals' correlation
SS '96 Proceedings of the 29th Annual Simulation Symposium (SS '96)
Maximum power estimation for CMOS circuits using deterministic and statistic approaches
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
A Statistical Model for Electromigration Failures
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Low-power MIMO signal processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Energy and peak-current per-cycle estimation at RTL
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Multimode power modeling and maximum-likelihood estimation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Nanoelectronic circuits and systems
Probabilistic gate-level power estimation using a novel waveform set method
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Transition-activity aware design of reduction-stages for parallel multipliers
Proceedings of the 17th ACM Great Lakes symposium on VLSI
A timing dependent power estimation framework considering coupling
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Low Power VLSI Design Techniques - The Current State
Integrated Computer-Aided Engineering
Power Estimation Under Uncertain Delays
Integrated Computer-Aided Engineering
Power optimal MTCMOS repeater insertion for global buses
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Timing-driven row-based power gating
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Analysis of Effects of Input Arrival Time Variations on On-Chip Bus Power Consumption
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Security against hardware Trojan through a novel application of design obfuscation
Proceedings of the 2009 International Conference on Computer-Aided Design
A timing-dependent power estimation framework considering coupling
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Maximum power estimation for CMOS circuits using deterministic and statistical approaches
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient statistical approach to estimate power considering uncertain properties of primary inputs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
PowerAdviser: an RTL power platform for interactive sequential optimizations
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
An Analytical Model for Evaluating Static Power of Homogeneous FPGA Architectures
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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