Automating Production of Run-Time Reconfigurable Designs

An integrated temporal partioning and partial reconfiguration technique for design latency improvement

DATE '00 Proceedings of the conference on Design, automation and test in Europe

Design-Space Exploration for Block-Processing Based TemporalPartitioning of Run-Time Reconfigurable Systems

Journal of VLSI Signal Processing Systems - Special issue on VLSI on custom computing technology

Reconfigurable computing: a survey of systems and software

ACM Computing Surveys (CSUR)

Automated design synthesis and partitioning for adaptive reconfigurable hardware

Hardware implementation of intelligent systems

Datapath merging and interconnection sharing for reconfigurable architectures

Proceedings of the 15th international symposium on System Synthesis

Reconfigurable Computing for Digital Signal Processing: A Survey

Journal of VLSI Signal Processing Systems

Development of a Run-Time Reconfiguration System with Low Reconfiguration Overhead

Journal of VLSI Signal Processing Systems

A Combined Approach to High-Level Synthesis for Dynamically Reconfigurable Systems

FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications

Introducing ReConfigME: An Operating System for Reconfigurable Computing

FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications

Debugging Techniques for Dynamically Reconfigurable Hardware

FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines

Accelerating Run-Time Reconfiguration on FCCMs

FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines

System-level power-performance trade-offs in task scheduling for dynamically reconfigurable architectures

Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems

A design flow for partially reconfigurable hardware

ACM Transactions on Embedded Computing Systems (TECS)

Multitasking on reconfigurable architectures: microarchitecture support and dynamic scheduling

ACM Transactions on Embedded Computing Systems (TECS)

Highly efficient, limited range multipliers for LUT-based FPGA architectures

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey

Journal of VLSI Signal Processing Systems

Optimization of Reconfiguration Overhead by Algorithmic Transformations and Hardware Matching

IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04

Run-time reconfigurable systems for digital signal processing applications: a survey

Journal of VLSI Signal Processing Systems

Incremental elaboration for run-time reconfigurable hardware designs

CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems

The datapath merging problem in reconfigurable systems: Complexity, dual bounds and heuristic evaluation

Journal of Experimental Algorithmics (JEA)

A model-based extensible framework for efficient application design using FPGA

ACM Transactions on Design Automation of Electronic Systems (TODAES)

An incremental temporal partitioning method for real-time reconfigurable systems

EHAC'06 Proceedings of the 5th WSEAS International Conference on Electronics, Hardware, Wireless and Optical Communications

Reducing reconfiguration time of reconfigurable computing systems in integrated temporal partitioning and physical design framework

IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing

Maximum edge matching for reconfigurable computing

IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing

Physically-aware exploitation of component reuse in a partially reconfigurable architecture

IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing

Energy reduction by systematic run-time reconfigurable hardware deactivation

Transactions on High-Performance Embedded Architectures and Compilers IV

A cost model for partial dynamic reconfiguration

Transactions on High-Performance Embedded Architectures and Compilers IV

Placing multimode streaming applications on dynamically partially reconfigurable architectures

International Journal of Reconfigurable Computing - Special issue on Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10)

On the asymptotic costs of multiplexer-based reconfigurability

Proceedings of the 49th Annual Design Automation Conference