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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Including inductance in static timing analysis
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A delay model for interconnect trees based on ABCD matrix
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
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Bus energy consumption for multilevel signals
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Exponentially tapered h-tree clock distribution networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Switch-factor based loop RLC modeling for efficient timing analysis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power characteristics of inductive interconnect
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Simulation of parasitic interconnect capacitance for present and future ICs
ICCS'05 Proceedings of the 5th international conference on Computational Science - Volume Part I
A design-oriented methodology for accurate modeling of on-chip interconnects
Analog Integrated Circuits and Signal Processing
An improved Elmore delay model for VLSI interconnects
Mathematical and Computer Modelling: An International Journal
Journal of Computational Electronics
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Closed-form solutions for the 50% delay, rise time, overshoots, and settling time of signals in an RLC tree are presented. These solutions have the same accuracy characteristics of the Elmore delay for RC trees and preserves the simplicity and recursive characteristics of the Elmore delay. Specifically, the complexity of calculating the time domain responses at all the nodes of an RLC tree is linearly proportional to the number of branches in the tree and the solutions are always stable. The closed-form expressions introduced here consider all damping conditions of an RLC circuit including the underdamped response, which is not considered by the Elmore delay due to the nonmonotone nature of the response. The continuous analytical nature of the solutions makes these expressions suitable for design methodologies and optimization techniques. Also, the solutions have significantly improved accuracy as compared to the Elmore delay for an overdamped response. The solutions introduced here for RLC trees can be practically used for the same purposes that the Elmore delay is used for RC trees