Toward achieving energy efficiency in presence of deep submicron noise

  • Authors:
  • Rajamohana Hegde;Naresh R. Shanbhag

  • Affiliations:
  • Univ. of Illinois at Urbana-Champaign, Urbana;Univ. of Illinois at Urbana-Champaign, Urbana

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2000

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Abstract

Presented in this paper are: 1) information-theoretic lower bounds on energy consumption of noisy digital gates and 2) the concept of noise tolerance via coding for achieving energy efficiency in the presence of noise. In particular, lower bounds on a) circuit speed f/sub c/ and supply voltage V/sub dd/; b) transition activity t in presence of noise; c) dynamic energy dissipation; and d) total (dynamic and static) energy dissipation are derived. A surprising result is that in a scenario where dynamic component of power dissipation dominates, the supply voltage for minimum energy operation (V/sub dd, opt/) is greater than the minimum supply voltage (V/sub dd, min/)for reliable operation. We then propose noise tolerance via coding to approach the lower bounds on energy dissipation. We show that the lower bounds on energy for an off-chip I/O signaling example are a factor of 24/spl times/ below present day systems. A very simple Hamming code can reduce the energy consumption by a factor of 3/spl times/, while Reed-Muller (RM) codes give a 4/spl times/ reduction in energy dissipation.