Automatic Symbolic Verification of Embedded Systems

  • Authors:
  • Rajeev Alur;Thomas A. Henzinger;Pei-Hsin Ho

  • Affiliations:
  • -;-;-

  • Venue:
  • IEEE Transactions on Software Engineering
  • Year:
  • 1996

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Abstract

We present a model-checking procedure and its implementation for the automatic verification of embedded systems. The system components are described as Hybrid Automata驴communicating machines with finite control and real-valued variables that represent continuous environment parameters such as time, pressure, and temperature. The system requirements are specified in a temporal logic with stop watches, and verified by symbolic fixpoint computation. The verification procedure驴implemented in the Cornell Hybrid Technology Tool, HYTECH驴applies to hybrid automata whose continuous dynamics is governed by linear constraints on the variables and their derivatives. We illustrate the method and the tool by checking safety, liveness, time-bounded, and duration requirements of digital controllers, schedulers, and distributed algorithms.