Recursive pseudo-exhaustive two-pattern generation

  • Authors:
  • Ioannis Voyiatzis;Dimitris Gizopoulos;Antonis Paschalis

  • Affiliations:
  • Department of Informatics, Technological Educational Institute of Athens, Athens, Greece;Department of Informatics, University of Piraeus, Piraeus, Greece;Department of Informatics and Telecommunications, University of Athens, Athens, Greece

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2010

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Abstract

Pseudo-exhaustive pattern generators for built-in self-test (BIST) provide high fault coverage of detectable combinational faults with much fewer test vectors than exhaustive generation. In (n, k)-adjacent bit pseudo-exhaustive test sets, all 2k binary combinations appear to all adjacent k-bit groups of inputs.With recursive pseudoexhaustive generation, all (n, k)-adjacent bit pseudoexhaustive tests are generated for and k ≤ n more than one modules can be pseudo-exhaustively tested in parallel. In order to detect sequential (e.g., stuck-open) faults that occur into current CMOS circuits, two-pattern tests are exercised. Also, delay testing, commonly used to assure correct circuit operation at clock speed requires two-pattern tests. In this paper a pseudoexhaustive two-pattern generator is presented, that recursively generates all two-pattern (n, k)-adjacent bit pseudoexhaustive tests for all k ≤ n. To the best of our knowledge, this is the first time in the open literature that the subject of recursive pseudoexhaustive two-pattern testing is being dealt with. A software-based implementation with no hardware overhead is also presented.