Codesign of graphics hardware accelerators
HWWS '97 Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware
Scalability, locality, partitioning and synchronization PDES
PADS '98 Proceedings of the twelfth workshop on Parallel and distributed simulation
Analog and Mixed-Signal Extensions to VHDL
Analog Integrated Circuits and Signal Processing - Special issue: Analog VHDL
RTL Test Justification and Propagation Analysis for Modular Designs
Journal of Electronic Testing: Theory and Applications - special issue on high-level test synthesis
Channel-based behavioral test synthesis for improved module reachability
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Safe timestamps and large-scale modeling
PADS '00 Proceedings of the fourteenth workshop on Parallel and distributed simulation
Register transfer level VHDL models without clocks
Proceedings of the conference on Design, automation and test in Europe
The use of B to specify, design and verify hardware
High integrity software
PACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Fast Hierarchical Test Path Construction for Circuits with DFT-Free Controller-Datapath Interface
Journal of Electronic Testing: Theory and Applications
Using a Programming Language for Digital System Design
IEEE Design & Test
SUAVE: Extending VHDL to Improve Data Modeling Support
IEEE Design & Test
Automatic Generation of Parallel CRC Circuits
IEEE Design & Test
External Adjustment of Runtime Parameters in Time Warp Synchronized Parallel Simulators
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
A Parallel LCC Simulation System
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Discrete-Event Simulation in Performance Evaluation
Performance Evaluation: Origins and Directions
Reusable DSP Functions in FPGAs
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
DFT guidance through RTL test justification and propagation analysis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
PACT HDL: a compiler targeting ASICS and FPGAS with power and performance optimizations
Power aware computing
Sleipnir-An Instruction-Level Simulator Generator
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
SystemC
Early estimation of the size of VHDL projects
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A Method Enabling Feasible Conformance Test Sequence Generation for EFSM Models
IEEE Transactions on Computers
Scheduling Optimization on the Simbus Backplane
ANSS '04 Proceedings of the 37th annual symposium on Simulation
Efficient RT-level fault diagnosis methodology
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
picoArray Technology: The Tool's Story
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
Hardware description languages
Encyclopedia of Computer Science
The MATRIX: a novel controller for musical expression
NIME '01 Proceedings of the 2001 conference on New interfaces for musical expression
Efficient RT-level fault diagnosis
Journal of Computer Science and Technology
On the identification of modular test requirements for low cost hierarchical test path construction
Integration, the VLSI Journal
Sequential Circuits for Relational Analysis
ICSE '07 Proceedings of the 29th international conference on Software Engineering
esim: a structural design language and simulator for computer architecture education
WCAE '00 Proceedings of the 2000 workshop on Computer architecture education
RTeasy: an algorithmic design environment on register transfer level
WCAE '04 Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture
Sequential circuits for program analysis
Proceedings of the twenty-second IEEE/ACM international conference on Automated software engineering
Design and synthesis of temperature controller using fuzzy for industrial application
FS'07 Proceedings of the 8th Conference on 8th WSEAS International Conference on Fuzzy Systems - Volume 8
Grammar-driven generation of domain-specific language debuggers
Software—Practice & Experience
A parameterizable handel-C neural network implementation for FPGA
HSI'09 Proceedings of the 2nd conference on Human System Interactions
An embedded vision sensor for robot soccer
EUROCAST'07 Proceedings of the 11th international conference on Computer aided systems theory
A generic system for interactive real-time animation
ECBS'97 Proceedings of the 1997 international conference on Engineering of computer-based systems
ESDL: a simple description language for population-based evolutionary computation
Proceedings of the 13th annual conference on Genetic and evolutionary computation
Self-correction of FPGA-Based control units
ICESS'05 Proceedings of the Second international conference on Embedded Software and Systems
System description: Combination of Isabelle/HOL with automatic tools
FroCoS'05 Proceedings of the 5th international conference on Frontiers of Combining Systems
Pricing American bond options using a penalty method
Automatica (Journal of IFAC)
Circuit Level Concurrent Error Detection in FSMs
Journal of Electronic Testing: Theory and Applications
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From the Publisher:The Designer's Guide to VHDL is both a comprehensive manual for the language and an authoritative reference on its use in hardware design at all levels, from the system level to the gate level. Using the IEEE standard for VHDL, the author presents the entire description language and builds a modeling methodology based on successful software engineering techniques. Requiring only a minimal background in programming, this is an excellent tutorial for anyone in computer architecture, digital systems engineering, or CAD. The book is organized so that it can be either read cover-to-cover for a comprehensive tutorial or kept deskside as a reference to the language. Each chapter introduces a number of related concepts or language facilities and illustrates each one with examples. Scattered throughout the book are four case studies, which bring together preceding material in the form of extended worked examples. All of the examples and case studies, complete with test drivers for running the VHDL code, are available via the World Wide Web. In addition, each chapter is followed by a set of related exercises.