An overview of deterministic functional RAM chip testing
ACM Computing Surveys (CSUR)
Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
Realistic Built-In Self-Test for Static RAMs
IEEE Design & Test
Serial Interfacing for Embedded-Memory Testing
IEEE Design & Test
Diagnostic testing of embedded memories using BIST
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Processor-programmable memory BIST for bus-connected embedded memories
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
A Built-in Self-Test Scheme with Diagnostics Support for Embedded SRAM
Journal of Electronic Testing: Theory and Applications
A Programmable BIST Core for Embedded DRAM
IEEE Design & Test
Built in self repair for embedded high density SRAM
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A Novel Built-In Self-Repair Approach for Embedded RAMs
Journal of Electronic Testing: Theory and Applications
Towards a Uniform Notation for Memory Tests
EDTC '96 Proceedings of the 1996 European conference on Design and Test
BIST for Embedded Word-Oriented DRAM
MTDT '98 Proceedings of the 1998 IEEE International Workshop on Memory Technology, Design and Testing
Memory Built-In Self-Repair using redundant words
ITC '01 Proceedings of the 2001 IEEE International Test Conference
A Family of Self-Repair SRAM Cores
IOLTW '00 Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW)
Built-In Self-Test for GHz Embbedded SRAMS Using Flexible Pattern Generator And New Repair Algorithm
ITC '99 Proceedings of the 1999 IEEE International Test Conference
An Algorithm for Row-Column Self-Repair of RAMs and Its Implementation in the Alpha 21264
ITC '99 Proceedings of the 1999 IEEE International Test Conference
A BIST-based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques
Journal of Electronic Testing: Theory and Applications
Testing and Reliability Techniques for High-Bandwidth Embedded RAMs
Journal of Electronic Testing: Theory and Applications
A New FPGA for DSP Applications Integrating BIST Capabilities
Journal of Electronic Testing: Theory and Applications
Automatic Generation of Diagnostic Memory Tests Based on Fault Decomposition and Output Tracing
IEEE Transactions on Computers
A P1500-Compatible Programmable BIST Aapproach for the Test of Embedded Flash Memories
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
An Efficient Diagnosis Scheme for RAMs with Simple Functional Faults
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Transparent memory testing for pattern sensitive faults
ITC'94 Proceedings of the 1994 international conference on Test
Hi-index | 0.00 |
A method of built-in self-diagnosis (BISD) for repairable, embedded static RAMs (SRAMs) is presented. The BISD circuit, with self-repair, requires about 5% extra area in a 64-kb SRAM. The circuit contains a small reduced-instruction-set processor, which executes diagnosis algorithms stored in a ROM. These algorithms employ hybrid serial/parallel operations when external repair is available or modular operations when self-repair is required. The algorithms, hardware design, and design costs and tradeoffs are discussed.