IEEE Transactions on Computers
Placement for clock period minimization with multiple wave propagation
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Design and realization of high-performance wave-pipelined 8 × 8 b multiplier in CMOS technology
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The practical application of retiming to the design of high-performance systems
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Valid clocking in wavepipelined circuits
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Sequential Circuit Design Using Synthesis and Optimization
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
A technique for high-speed, fine-resolution pattern generation and its CMOS implementation
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
Comparative Studies of Pipelined Circuits
Comparative Studies of Pipelined Circuits
AFIPS '69 (Spring) Proceedings of the May 14-16, 1969, spring joint computer conference
The IBM system/360 model 91: floating-point execution unit
IBM Journal of Research and Development
Wave steering in YADDs: a novel non-iterative synthesis and layout technique
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A novel high throughput reconfigurable FPGA architecture
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
A wave-pipelined router architecture using ternary associative memory
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
Interconnect pipelining in a throughput-intensive FPGA architecture
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Wave pipelining for application-specific networks-on-chips
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Wave steering to integrate logic and physical syntheses
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on system-level interconnect prediction (SLIP)
Two-Phase Asynchronous Wave-Pipelines and Their Application to a 2D-DCT
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
PITIA: an FPGA for throughput-intensive applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Fault tolerant clockless wave pipeline design
Proceedings of the 1st conference on Computing frontiers
Clocking and clocked storage elements in a multi-gigahertz environment
IBM Journal of Research and Development
A High Performance Hybrid Wave-Pipelined Multiplier
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Wave-pipelined on-chip global interconnect
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Optimization techniques for FPGA-based wave-pipelined DSP blocks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm)
Proceedings of the 2006 international symposium on Low power electronics and design
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
Parallel vs. serial on-chip communication
Proceedings of the 2008 international workshop on System level interconnect prediction
Improved ber performance in intra-chip rf/wireless interconnect systems
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Design and FPGA implementation of lifting scheme for 2D-DWT using wavepipelining
ISCGAV'05 Proceedings of the 5th WSEAS International Conference on Signal Processing, Computational Geometry & Artificial Vision
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Automation Schemes for FPGA Implementation of Wave-Pipelined Circuits
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Analysing the Robustness of Surfing Circuits
Electronic Notes in Theoretical Computer Science (ENTCS)
Wave-pipelined intra-chip signaling for on-FPGA communications
Integration, the VLSI Journal
Asynchronous current mode serial communication
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy and performance models for synchronous and asynchronous communication
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Effect of serialized routing resources on the implementation area of datapath circuits on FPGAS
WSEAS Transactions on Computers
Inscrypt'06 Proceedings of the Second SKLOIS conference on Information Security and Cryptology
The VLDB Journal — The International Journal on Very Large Data Bases
Low-Power High-Speed Hybrid Wave-Pipeline Architectures for Binary Morphological Dilation
Journal of Signal Processing Systems
| Hi-index | 0.00 |
Wave-pipelining is a method of high-performance circuit design which implements pipelining in logic without the use of intermediate latches or registers. The combination of high-performance integrated circuit (IC) technologies, pipelined architectures, and sophisticated computer-aided design (CAD) tools has converted wave-pipelining from a theoretical oddity into a realistic, although challenging, VLSI design method. This paper presents a tutorial of the principles of wave-pipelining and a survey of wave-pipelined VLSI chips and CAD tools for the synthesis and analysis of wave-pipelined circuits.