Balancing interconnect and computation in a reconfigurable computing array (or, why you don't really want 100% LUT utilization)

  • Authors:
  • André DeHon

  • Affiliations:
  • Berkeley Reconfigurable, Architectures, Software, and Systems, Computer Science Division, University of California at Berkeley, Berkeley, CA

  • Venue:
  • FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
  • Year:
  • 1999

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Abstract